Step to add overlay cell in RedHawk:
set via_8_vdd [ get_vias -filter "via_layer==VIA8 && net_type==Power && owner_net==VDD" ] set via_8_vss [ get_vias -filter "via_layer==VIA8 && net_type==Ground && owner_net==VSS" ] set via_rv_vdd [ get_vias -filter "via_layer==RV && net_type==Power && owner_net==VDD" ] set via_rv_vss [ get_vias -filter "via_layer==RV && net_type==Ground && owner_net==VSS" ] set strap_m8_vdd [ get_net_shapes -filter "layer==M8 && net_type==Power && owner_net==VDD" ] set strap_m8_vss [ get_net_shapes -filter "layer==M8 && net_type==Ground && owner_net==VSS" ] set strap_m9_vdd [ get_net_shapes -filter "layer==M9 && net_type==Power && owner_net==VDD" ] set strap_m9_vss [ get_net_shapes -filter "layer==M9 && net_type==Ground && owner_net==VSS" ] set strap_ap_vdd [ get_net_shapes -filter "layer==AP && net_type==Power && owner_net==VDD" ] set strap_ap_vss [ get_net_shapes -filter "layer==AP && net_type==Ground && owner_net==VSS" ] set all_pg_mesh [ add_to_collection $via_8_vss $via_8_vdd ] set all_pg_mesh [ add_to_collection $all_pg_mesh $via_rv_vss ] set all_pg_mesh [ add_to_collection $all_pg_mesh $via_rv_vdd ] set all_pg_mesh [ add_to_collection $all_pg_mesh $strap_m8_vdd ] set all_pg_mesh [ add_to_collection $all_pg_mesh $strap_m8_vss ] set all_pg_mesh [ add_to_collection $all_pg_mesh $strap_m9_vss ] set all_pg_mesh [ add_to_collection $all_pg_mesh $strap_m9_vdd ] set all_pg_mesh [ add_to_collection $all_pg_mesh $strap_ap_vdd ] set all_pg_mesh [ add_to_collection $all_pg_mesh $strap_ap_vss ] write_route -objects $all_pg_mesh -output overlay_pg_mesh.tcl
If DCAP cells are added, this stage will take a long time.
In my design, it cost about 5 hours. So don't kill it.
create_preroute_vias -from_object_strap -to_object_strap -from_layer M7 -to_layer M8 create_preroute_vias -from_object_macro_io_pin -to_object_strap -from_layer M7 -to_layer M8
set_write_stream_options \ -map_layer $streamout_mw_file \ -child_depth 10000 \ -keep_data_type \ -output_filling {fill} \ -output_pin {geometry text} \ -output_net [list text plex] \ -output_geometry_property \ -output_polygon_pin \ -compressed \ -max_name_length 100 write_stream -lib_name $mw_design_lib -format gds -cells overlay_t overlay_t.gds.gz
gds2def Configure file:
TOP_CELL overlay_11172011 GDS_MAP_FILE /tools/fip40.3/lsi40nm_3.0/tsmc_cln40g/shared/apache/gds2def/lsi40_7+2.layermap GDS_FILE overlay_20111123.gds.gz #LEF_FILE zx211100_overlay_11172011.lef VDD_NETS { VDD { VDD } } GND_NETS { VSS { VSS } } # CORE_EXTRACTION_STARTING_LAYER M2 # EXTRACTION_STARTING_LAYER M3 MEMORY_CELL auto_detect CHECK_TRACING 1
gds2def run command:
#! /bin/csh -f icsub -J gds2def -qa -Ip -q priority -R "rusage[mem=20000]" -do " gds2def overlay_gds2def.cfg "
Use RDL_CELL keyword in redhawk GSR file:
RDL_CELL { lsifcr overlay_11172011 overlay_gds2def/zx211100_overlay_11172011.def #LOCATION -27 -27 LOCATION 0 0 NET VDD VDD NET VSS VSS }