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vlsi:redhawk:pvt-corner

RedHawk PVT Corner Requirements

The following PVT corner should be used when selecting liberty files, generating spef file, and setting of temperature of Redhawk run.

Process Corner

Fast corner is recommended.

Temperature

125C is recommended because of the highest power grid resistance, and highest leakage power at this temperature. However, -40C is also recommended as an additional corner because of the highest dynamic peak current at this temperature.

Voltage

Ideally the nominal voltage is preferred (For instance, 0.9v for 40nm design.) However, not all libraries have the liberty files characterized at this corner.

In such a case, we recommend using VDD+10% (for instance, 0.99v for 40nm). This choice gives a slightly pessimistic result because of higher dynamic current, but we believe the slight pessimism is reasonable for signoff.

Interconnect Process Corner

RCworst corner is recommended. The internal study shows that both the most pessimistic dynamic and static IR drops occur at this corner.

EM Signoff Condition

The typical EM condition is at 125C for 10 years. However, some customers have a different EM requirement.

Leakage Current Scaling

For some designs, fast corner (3-sigma) liberty files may give pessimistic leakage power because customers screen out a certain fast corner parts such as anything above 1.5 sigma fast corner; thus the worst leakage will correspond to 1.5 sigma fast corner whose leakage will be much smaller than (3 sigma) fast corner case.

To simulate this reduced leakage effect, users can use leakage scaling factor as follows:

• Add “–b leakage.tcl” to “perform pwrcalc” as:

pwrcalc -b leakage.tcl

• Write “leakage.tcl” as:

rh_calc_power
scale_leakage_power <scale_factor>
generate_report

Here <scale_factor> means the ratio of leakage to be multiplied to the number given at the liberty. For example, scale_factor = 0.3 means 0.3 * <leakage at liberty> will be used at RH.

vlsi/redhawk/pvt-corner.txt · 最后更改: 2011/09/05 03:07 (外部编辑)